A continuing goal in the fabrication of integrated circuitry is to increase integration density by both making individual components smaller and packed closer together. This goal permeates throughout fabrication of all types of circuitry. One component of integrated circuitry are lines (i.e., an elongated structure which is overall longer than it is wide). Lines may be composed of one or more of dielectric material, semiconductive material, and conductive material (including conductively-doped semiconductive material). The lines may be any of one or more of straight, curved, curvilinear, combinations of differently angled straight segments, combinations of straight and curved linear segments (e.g., in racetrack-like patterns or in rings), etc. In many instances, lines are formed in arrays of a large number of repeating units, such as transistor gate lines, isolation lines, conductive interconnect lines, etc.
Photolithography is a conventional method used for fabrication of integrated circuitry components including the lines referred to above. Photolithography uses incident radiation to pattern openings through a photosensitive material. The patterned material may then be used as a mask for processing underlying materials in forming the desired regions and integrated circuitry components. Using photolithography alone, integrated circuitry density cannot be increased beyond a threshold dictated by the minimum attainable feature size using photolithography. Such feature size may be dictated by, for example, a wavelength used during the photolithography. To overcome such limitations, pitch multiplication techniques have been used.